{"title": "A Micropower CMOS Adaptive Amplitude and Shift Invariant Vector Quantiser", "book": "Advances in Neural Information Processing Systems", "page_first": 671, "page_last": 677, "abstract": null, "full_text": "A Micropower CMOS Adaptive Amplitude and \n\nShift Invariant Vector Quantiser \n\nRichard J. Coggins, Raymond J.W. Wang and Marwan A. Jabri \n\nComputer Engineering Laboratory \n\nSchool of Electrical and Infonnation Engineering, J03 \n\nUniversity of Sydney, 2006, Australia. \n\n{richardc, jwwang, marwan} @seda1.usyd.edu.au \n\nAbstract \n\nIn  this  paper we  describe the  architecture,  implementation and  experi(cid:173)\nmental results for an  Intracardiac Electrogram (ICEG) classification and \ncompression chip.  The chip processes  and  vector-quantises  30 dimen(cid:173)\nsional analogue vectors while consuming a maximum of 2.5  J-tW  power \nfor a heart rate of 60 beats per minute (1  vector per second) from a 3.3 V \nsupply.  This  represents  a significant advance on  previous  work  which \nachieved ultra low power supervised morphology classification since the \ntemplate matching scheme used  in  this chip enables unsupervised blind \nclassification of abnonnal rhythms and the computational support for low \nbit rate data compression.  The adaptive template matching scheme used \nis tolerant to amplitude variations, and inter- and intra-sample time shifts. \n\n1 \n\nINTRODUCTION \n\nImplantable cardioverter defibrillators  (ICDs)  are  devices  used  to  monitor  the  electrical \nactivity of the heart muscle and to  apply appropriate levels of electrical  stimulation if ab(cid:173)\nnonnal conditions are detected.  Despite the considerable success of ICDs they suffer from \na  number  of limitations  including  an  inability  to  detect  and  treat  some  abnonnal  heart \nrhythms and limited data recording capabilities. \n\nWe have previously shown that micropower analogue Multi-Layer Perceptron (MLP) neu(cid:173)\nral networks can be trained to separate such arrhythmia [4].  However, MLPs are best suited \nto  learning the  boundary between classes whereas a vector quantization scheme allows  a \nmeasure of the probability density of the morphological types to be estimated. \n\nMany analogue vector quantiser (VQ)  chips have  been reported in  the literature.  For ex(cid:173)\nample, a  16x256 500 kHz 50 mW 2 J-tm CMOS vector AID converter [10]  and a 16  x  16 \n300 kHz 0.7 mW 2 J-tm CMOS analogue VQ [1]. These correspond to an energy per match \n\n\f672 \n\nR. J.  Coggins,  R.  J.  W.  Wang and M.  A. Jabri \n\nper  dimension  of 24  pI  and  9  pI respectively.  The  integrated  circuit  (lC)  described  in \nthis  paper is  distinguished from  these  approaches in that it is  specifically targeted for  the \nlow power, low bandwidth application of ICEG classification and compression.  Our chip \nachieves  vector matching  (without the  winner take  all  function)  to  7  bit  30 dimensional \nvectors with three coefficient linear prediction, at an energy consumption of 15 pI per tem(cid:173)\nplate per dimension using a  1.2 pm CMOS  process.  Although this figure  is  greater than \nthat for  [1] it should be noted that in  [1]  the mean absolute error metric is used rather than \nthe squared Euclidean  distance and  no provision is  provided for  linear transformation of \nthe incoming analogue vector. \n\n2  ADAPTIVE DATA COMPRESSION \n\nRecording of ICEGs in ICDs is currently very limited due to the amount of memory avail(cid:173)\nable and the power/area cost of implementing all but the simplest compression techniques. \nMicropower template matching however, enables large amounts of the signal to be encoded \nas template indices plus amplitude parameters. Effective compression ofthe ICEG requires \nadaptation to the short term non-stationary behaviour of the ICEG [2] . In particular, short \nterm  amplitude variations, lag variation,  phase variation  and  ectopic  beats  (which  origi(cid:173)\nnate from the ventricles of the heart and have differing morphology) reduce the achievable \ncompression.  The  impact of ectopic  beats  can  be  reduced  by  increasing  the  number  of \ntemplates. This can often be achieved without increasing the code book search complexity \nby using associated timing features.  The amplitude and shift variations require short term \nadaptation of the template matching in order to minimise the residual error and hence raise \nthe compression ratio at fixed distortion. \n\n2.1  Amplitude and Shift Invariant Matching \n\nIn  order to  facilitate  analogue  implementation,  a  backward prediction  procedure is  used \nrather than the usual forward prediction [8].  This approach allows the incoming analogue \ntemplate to be manipulated in the analogue domain for amplitude and shift invariance pur(cid:173)\nposes.  Consider the long term backward prediction problem described by, \n\n)  b  {x(n + a  + 1)  - x(n + a  - I)} \n\n2 \n\n()  -()  b  ( \n\nrb  n  =  x  n  - OX  n + a - I  \n\n(1) \nwhere rb (n) denotes the backward residuals, x is a template which is a function of previous \nbeats, x( a) is the sampled ICEG signal, a the time index, n is the template index and bo and \nbl  are the amplitude and phase coefficients respectively. bo scales the current beat to match \nthe template and hence is  an amplitude term.  b1  scales the central difference of the current \nbeat  and  is  a  function  of the  amplitude  and  phase  corrections  required  to  minimise  the \nresiduals.  To  see why this  is  a phase term consider the Taylor expansion of Ax(t + \u00a2)  to \nthe first derivative term around t, \n\nAx(t + \u00a2)  =  Ax(t) + A\u00a2x' (t) \n\n(2) \nwhere \u00a2  is  a  small  phase  shift of x(t)  and  A  is  the  amplitude factor.  When  \u00a2  is  due  to \nsampling jitter then, -t :::;  \u00a2  :::;  t, where T  is  the sampling period.  Provided that x(t) is \nsampled according to the Nyquist criterion,  \u00a2  is  sufficiently  small  for  the  first  derivative \nterm to adequately account for the sampling jitter. Hence, bi accounts for the residual error \nremaining after optimisation of the integer a.  a  is approximately determined by the  beat \ndetector of the ICD which attempts to detect the fiducial  point of heart beats  using filters \nand comparators.  bo and  b1  can be determined by  minimising the squared error between \nthe current signal  window  and the  previously recorded template  which in  this  case has  a \nclosed form solution in terms of correlation coefficients. However, in Section 3 we present \nan alternative iterative procedure suited to low-power analogue implementations. \n\n\fA Micropower CMOS Adaptive Amplitude and Shift Invariant Vector Quantiser \n\n673 \n\n3  SYSTEM ARCHITECTURE &  IMPLEMENTATION \n\n'-\n\n\"\"~fC\"'-1 \u2022\u2022 \n\n... ~) \u2022\u2022\u2022 \"'J \n\nn. \nLL \n\nr  , ..  ::;-\n\n'.I~ \n\n1'11':::--\nI'U =-\n\nFigure I: Left:  Block diagram of the adaptive linear transfonn VQ chip. Middle: Floorplan \nof the chip.  Right:  Photomicrograph of the chip. \n\nThe  ICEG  is  first  high  pass  filtered  to  remove  the  DC  and  then  is  bandpass  filtered  to \nprevent aliasing  and enhance the high frequency  component for  beat detection.  (This  is \nthe  filtering  approach already existing  in  an  ICD  and  therefore  not  implemented by  us). \nThis then feeds the discrete time analogue delay line, which is continuously sampling the \nsignal at 250 Hz.  The analogue samples are then transfonned by a two layer network. The \nfirst  layer implements the  linear prediction  by  adjusting  the  amplitude  bo and  the phase \nof the analogue vector.  Note that the phase consists of two components,  the  coarse part \na corresponding to sample lags and the fine part b1 corresponding to intra-sample lags. The \nsecond layer calculates the distance between the linearly predicted vector and the template \nwen) to be matched.  A comparator is provided so that a match to within a given threshold \nmay be detected. \n\n3.1  Chip Architecture \n\nInput  to  the  IC  is  via  a  single  analogue channel  which  is  sampled by  a  bucket brigade \ndevice  of length  30.  The  resultant  30 dimensional  analogue  vector is  adaptively  linear \ntransfonned to facilitate a shift and scale invariant match to a digital (7  bit per dimension) \ntemplate.  The IC generates digital representations of the square of the Euclidean distance \nbetween the transfonned analogue vector and the digital template.  A block diagram of the \nIC appears in Figure  I.  The IC has been fabricated.  Perfonnance figures in this paper are \nbased on measurements of the chip fabricated in a 1.2/-Lm CMOS MOSIS process. \n\nThe  block diagram  shows  the  input signal  being  sampled  by  the  bucket  brigade device \n(BBD)[4].  The signal is sampled at a rate of 250 Hz.  Existing circuitry in the defibrillator \ndetects the peak of the heart beat and hence indicates a coarse alignment (due to detection \njitter) to the template stored in the template DACs (TDACs). The BBD continues to sample \nuntil  the  coarse alignment is  attained  at  which point the IC  is biased up.  The BBD  now \ncontains a segment of the ICEG corresponding to one heart beat. The digital error output is \nthen monitored with the linear transfonn blocks configured to  I: I mappings until an error \nminimum is  detected indicating optimal sampling alignment.  The three linear transfonn \ncoefficient DACs (CDACs) which are common to the 30 linear transfoqn blocks may then \nbe adapted to further reduce the matching error. The transfonnation can be represented by \nyen)  =  aox(n - 1) + alx(n) + a2x(n + 1)  where ao  corresponds to CDACO etc.  This \nconstitutes a general linear long tenn prediction [8].  Constraining CDACO and CDAC2 to \nbe equal  magnitudes and opposite signs  results  in  a minimisation of errors due to phase \nand amplitude variation and a simpler adaptation procedure.  The matching error is  com(cid:173)\nputed via the squarer blocks and the summing node. The matching error consists of both a \nmagnitude and exponent thereby increasing the dynamic range of the error representation. \n\n\f674 \n\nR. J.  Coggins,  R.  J.  W  Wang and M.  A . Jabri \n\nThe magnitude is  the  output of the  squarer block.  The exponent is  determined by control \nof a current reference in the squaring circuit.  A reference DAC and precision current com(cid:173)\nparator provide the  means  of successive  approximation AID  conversion  of the  matching \nerror current [ERR.  Using this scheme heart beat morphology can be classified by loading \ndifferent  templates  (TDAC  values).  A  stream  of beats  may  be  compressed  by  identify(cid:173)\ning matches with continuously updated representations of previous  beats.  Close matches \nare encoded by  an  index and an  amplitude coefficent while poor matches are encoded by \nquanti sed residuals which have been minimised by the linear prediction. \n\n3.2  Adaptation and Learning \n\nThe first  step in  the learning process is  to determine a, the coarse phase lag.  This can  be \nachieved  by  shifting the  delay  line  and  evaluating the  error until  a minimum  is  reached. \nOnce  the  coarse phase  lag  a  has  been  determined the  error function  to  be  minimised  to \ncompensate for amplitude and phase variations is given by E  =  E~I (bOXi+bI~Xi-Wi)2, \nwhere  the  subscript i  implicitly  incorporates  the  coarse phase a.  This  is  a  quadratic  in \nbo and bl .  bo and bi  can be optimised separately provided cross terms in  E are negligible. \nHere the cross terms  are given by  E~I 2bobIXi~Xi = bobI(XN+IXN  - XIXO).  Thus, if \nthe  end  points  of the  N  point window  have  approximately the  same  value (as  is  usually \nthe  case for  ICEG  beats)  then  the  cross  terms  in  E  are  negligible  and  bo and  bi  can  be \noptimised separately. \n\nSo the only remaining issue is  how to optimise a single parameter.  A simple linear search \ntakes at most 2b evaluations of E where b is the number of bits.  A search based on bisection \ntakes  b + 2  evaluations.  Techniques  involving  gradient  descent  and  conjugate  gradient \nlead to  more complex learning logic  with minor reductions in  the number of evaluations. \nTherefore,  bisection  is  the  best  compromise  between  the  number of evaluations  and  the \ncomplexity of the learning state machine. \n\nOnce  the  best  template  match  has  been  achieved,  learning  may  also  then  be  applied  to \nthe  template  itself depending  on  the  application  and  context.  For example,  in  the  case \nof adaptive classification  a  weight perturbation  algorithm  [6]  could  be  used  to  adapt the \ntemplate  for  morphological  drift  based  on  heart  rate  information.  Similarly,  for  a  data \ncompression  application,  if the  template  match  exceeds  a  fidelity  criterion  the  template \nmay be adapted and the template changes logged in the compression record. \n\n3.3  Building Blocks \n\nIn order to implement the template matcher, sub-threshold analogue VLSI building blocks \nwere designed. All transistors in the building blocks operate in weak inversion exclusively. \nWe  do not have the space to describe all  of the building blocks,  so  we  will  focus  here on \nthe linear transform and squarer cells. \n\n3.3.1  Linear Transform Cell \n\nThe linear transform (LT)  cell consists  of three linearised differential pairs [7]  with their \nbiases controlled by the coefficient DACs (CDACs) (see Figure 2(a\u00bb. The nature ofthe lin(cid:173)\nearisation is controlled by the ratio of the aspect ratios.ofM3 to M5 and M4 to M6.  Methods \nfor choosing this ratio are discussed in [5].  Denoting the aspect ratio of a transistor by S we \nchose S3/ S5  =  S4/ S6  = 4.  This  introduces some ripple in  the  transconductance while \nincreasing the asymptotic  saturation voltage to 4nUT  compared to  nUT  for the  ordinary \ndifferential pair.  Signed coefficients are  achieved by switches at the outputs of the differ(cid:173)\nential pairs.  The template DACs  (TDACs) have differential outputs to form the difference \ny(n) - w(n) where w(n) is the nth template value. \n\n\fA Micropower CMOS Adaptive Amplitude and Shift Invariant  Vector Quantiser \n\n675 \n\n3.3.2  Squaring Cell \n\nThe squaring function must meet the following  design constraints.  It should have current \ninputs and outputs in order to avoid linear current to voltage conversion at low currents. The \nsquared current must be normalised to  the  original linear range to  avoid excessive power \nconsumption.  The squaring function  should avoid the MOS square law approach in order \nto  conserve space and power,  and  the  the  available  voltage range should  be  3.3 V  rail  to \nrail. \n\nRCLK1  D--~--*\"-<l \n\nVIOl \n\nV.. \n\nRClK2 D---ol<t+--<l \n\nL-:-t-~-+--o \n\n(a) \n\n(b) \n\nFigure 2:  (a)  Circuit diagram  of one  of three  the  linear transform linearised  differential \npairs in the LT cell. (b) Circuit diagram of the squarer (SQ cell) and the summing node. \n\nThe choices available then  are restricted to  weak inversion circuits.  The circuit (see Fig(cid:173)\nure 2(b)) used relies on the translinear principle [9].  Here, loops of MOS g-s  diode struc(cid:173)\ntures  operating in  weak inversion are used to form a normalised squared current which is \nsummed to form the final  normalised output.  The translinear loops are implemented with \nP-type transistors in separate N-wells to avoid the body effect. Positive and negative inputs \nare squared separately using the RCLK signals and then added at the output. \n\n3.4  Circuit Performance \n\nTable  1:  Summary of electrical specifications of the chip. \n\nItem \nTemplate dimension \nAdaptation coefficients \nDAC Precision \nMax. Error per dimensiona \nLSB  bias \nPower comsumption \n\nConditions \n\nExcludes squarer error gain control \nWeighted lateral PNP \nCDACx=64, DCBBD, wlr to TDACs \n\nTDACs=CDACl=64, duty cycleb = 3.2% \n\nValue \n30 \n3 \n7 bits \n2 bits \n2nA \n2.5 J-LW \n\na  Excludes error at  1st CDACO stage.  b  For 1 bpm, chip biased up 8/250 of the time. \n\nWe  provide three  measures  of the  performance of the  chip along  with  a summary  of its \nbasic electrical characteristics which is  shown  in  Table  1.  The first measure characterises \nthe  accuracy  of the  template matching  function  relative  to  the  available  precision  of the \ntemplate.  This is summarised by the Maximum Error per dimension in Table  1 which was \nproduced by inputing a zero offset DC signal into the BBD and setting each CDAC in turn to \none half of its maximum value.  The TDACs were then adjusted so as to minimise the output \nof the squarer.  Therefore, the reSUlting TDAC values indicate the  accumulated effects  of \ntransistor mismatches through each path to  the  squarer output.  The curves generated  are \naverages over 80 trials to remove noise influences (where as the classification performance \n\n\f676 \n\nR. J.  Coggins,  R. J.  W  Wang and M.  A. Jabri \n\nshown in  Table Irefvterr-tab includes such influences).  The curves showed that except for \nthe input stage corresponding to CDACO (stage 30) the accumulated mismatches influence \nthe  two  least  significant  bits  of the  TDACs.  A  larger  error  of 4  bits  for  the  first  stage \nfeeding CDACO  was  due to a design oversight of not providing a dummy capacitive load \nto the input end of the BBD (stage 30 of CDACO derives its input from the input BBD cell, \nwhich does  not have the  full  capacitive loading of three linearised differential pairs as  on \nthe rest of the cells). \n\nTable 2:  Relative impact on the error output of the chip for the adaptation steps of align(cid:173)\nment,  amplitude and  phase correction for  patient No.  2s  ST rhythm.  The errors  are  nor(cid:173)\nmalised to the non-aligned error.  A numerical simulation is provided for comparison to the \nchip performance. \n\nAdaptation step \nNo align \nAlign \nAmplitude \nPhase \n\nChip Error \n\nStd.  Dev. \n\nSimulation Error \n\nStd.  Dev. \n\n1.0 \n0.31 \n0.16 \n0.07 \n\n0.04 \n0.07 \n0.05 \n0.01 \n\n1.0 \n0.41 \n0.37 \n0.32 \n\n0.28 \n0.35 \n0.22 \n0.16 \n\nThe second  performance measure uses  real  heart  patients  ICEG  (Sinus  Tachycardia) ST \ndata.  Table 2 shows the normalised output error of the chip averaged over 107 heart beats \nwhile  being compared to the  10th beat in  the  series.  The normalised error was  measured \nfrom a mirrored version of the current at the output of the chip. The adaptation steps shown \nin the table are as follows.  \"No align\" implies that the error for the template match is deter(cid:173)\nmined only  by the approximate alignment provided by  a numerical simulation of the beat \ndetector of the ICD. \"Align\" corresponds to coarse alignment where the matching error is \ncalculated up  to  two  samples either side to  determine the  best positioning of the  input in \nthe  BBD.  \"Amplitude\"  corresponds to  adaptation  of the  amplitude coefficient by  adjust(cid:173)\nment ofCDAC1. \"Phase\" corresponds to adaptation of the difference between CDAC2 and \nCDACO.  Each of the adaptations reduces the error of the match with the coarse alignment \nbeing most significant.  An  idealised limited precision  numerical  simulation  of the  error \ncalculation is  also provided in the table for comparison.  It can be seen that the amplitude \nand phase adaptation steps lower the relative error more for the chip than in the simulation. \nThis  is  most likely due to  the adaptation on the chip  also compensating for the analogue \nnoise and imprecision as  well as  the variability of the original data. \n\nThe  third  performance measure  illustrates  the  ability  of the  chip to  solve  a  blind  classi(cid:173)\nfication  problem and  is  summarised in  Table  3.  The  safe rhythm of the  patient is  Sinus \nTachycardia  (ST).  For  each patient  one beat is  chosen  at  random  as  the  template  and  is \nloaded into the  TDACs  of the  chip.  The 20 beats  subsequent to the  chosen  template  are \nthen  used  to  determine the average  error between  templates  after adaptation.  Twice  this \nerror  is  then  used  as  the  classifier  threshold for  \"safe\"  versus  \"unknown\".  The  ST and \nVT data sets for the patient are then passed through the chip and classified giving the col(cid:173)\numn \"% Correct chip\".  For comparison the expected best performance for the data set are \nalso reproduced in  the table from  previous  work by  the authors  [3].  The results  indicate \nthat a very simple blind classification algorithm when combined with the adaptive template \nmatching capabilities of the chip shows good performance for 4 out of 5 patients. \n\n4  CONCLUSION \n\nWe have presented a micropower learning vector quantization system that can provide hard(cid:173)\nware support for both signal classification and compression of ICEG signals. The analogue \nblock can be used to implement several different classification and compression algorithms \n\n\fA Micropower CMOS Adaptive Amplitude and Shift Invariant  Vector Quantiser \n\n677 \n\nTable 3:  Performance of the chip on a blind classification task for 5 patients with Ventricular \nTachycardia (VT) 1: 1 retrograde conduction compared to classification bounds. \n\na  The R point search interval was increased to 4 for this patient. \n\ndepending on  how the  template  matching capability  is  utilised.  By  providing significant \ncompression capability  in  an  lCD,  a larger data base  of natural  onset cardiac arrhythmia \nshould become available, leading to improved designs of ICD based adaptive classification \nand compression systems. \n\n5  ACKNOWLEDGEMENTS \n\nThe work in  this  paper was  funded  by  the Australian Research Council and  Telectronics \nPacing Systems Ltd, Sydney, Australia. \n\nReferences \n\n[1]  G.  Cauwenberghs and V.  Pedroni.  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In \nProceedings of the International Solid State Circuits Conference, pages 38-39,1993. \n\n\f", "award": [], "sourceid": 1558, "authors": [{"given_name": "Richard", "family_name": "Coggins", "institution": null}, {"given_name": "Raymond", "family_name": "Wang", "institution": null}, {"given_name": "Marwan", "family_name": "Jabri", "institution": null}]}