Part of Advances in Neural Information Processing Systems 2 (NIPS 1989)
This paper explores whether analog circuitry can adequately per(cid:173) form constrained optimization. Constrained optimization circuits are designed using the differential multiplier method. These cir(cid:173) cuits fulfill time-varying constraints correctly. Example circuits in(cid:173) clude a quadratic programming circuit and a constrained flip-flop.