Yusuke Nakashita, Yoshio Mita, Tadashi Shibata
An analog focal-plane processor having a 128128 photodiode array has been developed for directional edge ﬁltering. It can perform 44-pixel kernel convolution for entire pixels only with 256 steps of simple ana- log processing. Newly developed cyclic line access and row-parallel processing scheme in conjunction with the “only-nearest-neighbor in- terconnects” architecture has enabled a very simple implementation. A proof-of-concept chip was fabricated in a 0.35-(cid:0)m 2-poly 3-metal CMOS technology and the edge ﬁltering at a rate of 200 frames/sec. has been experimentally demonstrated.