The Adaptive Solutions CN APS architecture chip is a general purpose neurocomputer chip. It has 64 processors, each with 4 K bytes of local memory, running at 25 megahertz. It is capable of implementing most current neural network algorithms with on chip learning. This paper dis(cid:173) cusses the implementation of the Back Propagation algorithm on an array of these chips and shows performance figures from a clock accurate hard(cid:173) ware simulator. An eight chip configuration on one board can update 2.3 billion connections per second in learning mode and process 9.6 billion connections per second in feed forward mode.